The manufacture of Micro-Electro-Mechanical Systems (MEMS) such as micro-gyroscopes, micro-accelerometers, RF micro-resonators, micro-mirrors, micro-motors, micro-actuators and other such micro-devices integrating very sensitive moving mechanical parts poses some very serious challenges because they must meet a number of stringent requirements. Specifically:                i. These very sensitive mechanical parts are typically made of silicon, (polysilicon or silicon-germanium).        ii. Such mechanical parts need to display either low or specific stress values and low or specific stress gradient properties which is typically achieved during a stress/stress-gradient relief step during a high temperature annealing process.        iii. The mechanical parts need to present a good electrical conductivity.        iv. The mechanical parts need to be integrated with other permanent and/or temporary (sacrificial) materials.        v. The integration of all the materials together may cause some detrimental interactions due to the thermal budget and the subsequent annealing steps that could thus affect the layers previously deposited/annealed and therefore modify the film stress and stress gradient values along the processing of the devices.        vi. It may also be required to combine annealed with non-annealed structures or to combine doped with undoped layers in order to achieve the desired stress values which in turn increases the manufacturing costs and/or complexity.        
A method for manufacturing wafers should permit the accurate control of the mechanical stress and stress gradient as well as the uniformities (within-wafer and wafer-to-wafer) of those film properties. In such a case, having the ability to in-situ control and to achieve the desired and targeted stress or stress gradient to obtain the final device properties required is an object of this invention.
Various attempts have been made to control stress in the prior art. Some of those attempts are described below.
Si-Based Layers for Device Manufacturing
CWRU's Multipoly Process
Case Western Reserve University (Yang et al.) developed an impressive 9-layer MultiPoly film with a stress <10 MPa. However, such film is not conductive and displays a 2 μm deflection over a 310-μm long beam. In addition to the stress gradient or resistivity issues displayed by the CWRU's MultiPoly film, such layers display a high roughness of 16 nm even for quasi-amorphous films as presented in FIG. 1. Despite the high potential of such a deposition method, this film presents severe drawbacks due to the stress gradient and the film resistivity. In addition, this material developed by Case Western Reserve University does not allow one to deposit a film with the exact stress level desired.
IMEC's PECVD Poly-SiGe films
Rusu et al. from the IMEC showed some promising results with doped PECVD Poly-SiGe films as they were able to achieve low stress (<20 MPa) films at a deposition temperature as low as 400° C. and annealed at temperature from 450 to 520° C. However, in that case they only achieved film resistivities ranging from ˜10 to ˜100 Ω-cm as presented in FIG. 2. In order to achieve a resistivity between 1 mΩ-cm and 10 mΩ-cm, the annealing temperature needs to be increased up to 600° C. which then, in turn, affects the film stress and brings it up above 300 MPa as shown in FIG. 2 and FIG. 3.
In addition to the stress or resistivity issues displayed by the IMEC's Poly-SiGe film, such layers display a moderately high roughness of 9.2 nm even for quasi-amorphous films as presented in FIG. 4.
Nevertheless, this film does not provide one a good control of the stress.
Impact of AsH3 Doping on In-Situ Doped Amorphous Si Film Properties
It has been proposed by Ouellet et al. that using AsH3 in conjunction with PH3 would lead to a near-zero stress film. This method has the advantages of using the physical size of the P and As atoms as interstitial atoms to control the film stress. Although depositing a film in-situ doped with As and P leads to a low-stress layer, it does not allow one to easily select the desired stress. On the other hand, another invention from Ouellet et al. demonstrates the possibility to vary the stress by using a combination of phosphorus-doped and undoped Si films to achieve the desired stress. In this case however, the film resistivity would not be uniform throughout the entire thickness of the film therefore requiring an annealing step which would then annihilate the impact of the multilayer process and would thus lead to an undesired stress value.
Impurities in Deposited Film
Oxygen and Other Impurity Concentration at Low Deposition Temperatures
Green et al. clearly identified that the deposition temperatures have a significant impact on the concentration of oxygen in the Si films. They also identified that using the SiH4 precursor had a smaller impact on this oxygen incorporation as shown in FIG. 5. The results presented in this figure clearly demonstrate that the higher the deposition temperature, the lower the oxygen concentration in the Si film. This statement is true independently of the Si precursor used.
Impact of Gas Purifiers on Gas Impurities
It has been shown by Hsu et al. that the concentration of impurities can be significantly reduced by adding gas purifiers on the gas lines of an epitaxial Si growth chamber. As a matter of fact dual-layer films (1st half with and 2nd half without gas purifiers) showed a significant decrease of the oxygen, hydrogen and carbon concentration. For example, the oxygen concentration goes from 4E19at./cm3 to 3E18at./cm3 after using the gas purifiers on the gases used in the chamber for an epitaxial Si grown at a temperature of 305° C. as shown in FIG. 6.
Further details of the prior art processes can be found in the following references, which are herein incorporated by reference:    i. M. L. Green, D. Brasen, M. Geva, W. Reents Jr., F. Stevie and H. Temkin, Oxygen and carbon incorporation in low temperature epitaxial Si films grown by rapid thermal chemical vapor deposition (RTCVD), Journal of Electronic Materials, Vol. 19, No. 10, 1990, pp. 1015-1019.    ii. T. Hsu, B. Anthony, L. Breaux, R. Qian, S. Banerjee, A. Tasch, C. Magee and W. Harrington, Defect microstructure in single crystal silicon thin films grown at 150° C.-305° C. by remote plasma-enhanced chemical vapor deposition, Journal of Electronic Materials, Vol. 19, No. 10, 1990, pp. 1043-1050.    iii. J. Yang, H. Kahn, A.-Q. He, S. M. Philips, A. H. Heuer, A new technique for producing large-area as-deposited zero-stress LPCVD polysilicon films: The MultiPoly Process, IEEE Journal of Microelectromechanical Systems, Vol. 9, No. 4, December 2000, 485-494.    iv. C. Rusu, S. Sedky, B. Parmentier, A. Verbist, O. Richard, B. Brijs, L. Geenen, A. Witvrouw, F. Larmer, F. Fischer, S. Kronmuller, V. Leca and B. Otter, New low-stress PECVD Poly-SiGe layers for MEMS, Journal of microelectromechanical systems, Vol. 12, No. 6, December 2003, pp. 816-825.    v. Luc Ouellet and Robert Antaki, Method of fabricating silicon-based MEMS devices, U.S. Pat. No. 7,144,750, Dec. 5, 2006.    vi. Luc Ouellet and Robert Antaki, Fabrication of advanced silicon-based MEMS devices, U.S. Pat. No. 7,160,752 B2, Jan. 9, 2007.